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參數資料
| 型號： | W6692 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 通信及網絡 |
| 英文描述： | PCI Bus ISDN S/T Interface Controller(PCI總線的ISDN S/T接口控制器) |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQFP100 |
| 封裝： | 14 X 20 MM, 2.75 MM HEIGHT, QFP-100 |
| 文件頁數： | 34/84頁 |
| 文件大?。?/td> | 473K |
| 代理商： | W6692 |
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W6692
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Extended transparent mode:
All the data in the transmit FIFO are transmitted without any modification, i.e. no flags and CRCs are
inserted, and no bit stuffing is performed.
Transmission is started by a XMS command. The transmitter requests another block of data via XFR
interrupt when more than a threshold length of vacancies are left in the FIFO. The micro-processor
reacts to this condition by writing up to a threshold length of data into the transmit FIFO and issues a
XMS command to continue the message transmission.
The micro-processor reaction time depends on the FIFO threshold setting and B channel data rate.
For example, it is 8 mS if the FIFO threshold is 64 and the B channel data rate is 64 kbps. If the
micro-processor fails to respond within the given reaction time, the transmit FIFO will hold no data to
transmit. In this case, the W6692 will automatically reset the transmitter and send the inter frame time
fill pattern on B channel. The micro-processor is informed about this via a Transmit Data Underrun
interrupt (XDUN bit in Bn_EXIR register). The microprocessor must wait until transmit FIFO ready (via
XFR interrupt), re-write data, and issue XMS command to re-transmit the data.
7.8 GCI Mode Serial Interface Bus
The GCI is a generalization and enchancement of the general purpose serial interface bus. The GCI
bus offers capacity for the transfer of maintenance information. In terminal applications, the GCI
constitute a powerful backplane bus offering sophisticated control capabilities for peripheral modules.
The channel structure of the GCI mode is depicted below:
Channel Structure of the W6692 GCI Mode:
B1
B2
Mon
D C I
NULL
NULL
B1
B2
Monitor
D
C/I
MR
MX
1
st
Octet 2
nd
Octet 3
rd
Octet
4
th
Octet
Figure 7.8 GCI Mode Channel Structure
The first two octets constitute the two 64 Kbps B channels.
The third octet is the Monitor channel. It is used for the exchange of data between the W6692 and the
other attached device
using the GCI Monitor channel protocol.
The fourth octet (control channel) contains: two bits for the 16 Kbps D channel, a 4-bit C/I channel
(Command/Indication channel), and 2-bit MR and MX for supporting the Monitor channel handshaking
protocol.
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PDF描述 |
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| W6693A | USB Bus ISDN S/T Interface Controller(USB總線的ISDN S/T接口控制器) |
| W6694 | PCI Bus ISDN S/T Interface Controller(PCI總線的ISDN S/T接口控制器) |
| W6810 | SINGLE-CHANNEL VOICEBAND CODEC |
| W6810IE | SINGLE-CHANNEL VOICEBAND CODEC |
| W6810IR | SINGLE-CHANNEL VOICEBAND CODEC |
相關代理商/技術參數 |
參數描述 |
|---|---|
| W6692A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TE Mode S/T Controller with PCI 2.2 Interface and ACPT |
| W6692ACD | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ISDN LINE INTERFACE|BASIC|CMOS|QFP|100PIN|PLASTIC |
| W6692ACF | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ISDN LINE INTERFACE|BASIC|CMOS|QFP|100PIN|PLASTIC |
| W6694 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:USB Bus ISDN S/T-Controller |
| W6694A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TE Mode S/T Controller with USB 1.1 Interface |
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