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參數(shù)資料
| 型號(hào)： | W6692 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | PCI Bus ISDN S/T Interface Controller(PCI總線的ISDN S/T接口控制器) |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQFP100 |
| 封裝： | 14 X 20 MM, 2.75 MM HEIGHT, QFP-100 |
| 文件頁數(shù)： | 39/84頁 |
| 文件大?。?/td> | 473K |
| 代理商： | W6692 |
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W6692
Publication Release Date: October 1998
- 39 -
Revision A1
7.9.2 Cascade Structure of Interrupt Sources
The W6692 uses cascade structure to record the causes of various interrupts. The interrupt structure
is shown in Figure 7.10.
A read of the ISTA register clears all the interrupts except D_EXI, B1_EXI and B2_EXI bits. These
three bits are cleared if their corresponding extended interrupt registers are cleard.
B1_EXI bit is cleared by reading the B1_EXIR register and B2_EXI bit is cleared by reading the
B2_EXIR register. Reading of B1_EXIR or B2_EXIR register clears all the bits in it. The B1_EXIM and
B2_EXIM registers mask the corresponding bits in the B1_EXIR and B2_EXIR registers.
To clear the D_EXI bit, all the bits in D_EXIR must first be cleared. A read of the D_EXIR register
clears all the bits except the ISC bit. The ISC bit is cleared by a read of CIR and SQR registers.
An ISC interrupt may originate from
- a change in the received indication code (ICC bit in CIR register) or
- a change in the received S code (SCC bit in CIR register).
The ICC interrupt can not be disabled while the SCC interrupt can be disbled by clearing the SCIE bit
in SQX register.
Bits SCC and ICC are cleared by a read of SQR and CIR.
D_EXIM register masks the corresponding bits in D_EXIR register. If the D_EXIM: ISC bit is set to
one, it masks the ICC and SCC interrupts.
The ICC or SCC bit is set whenever a new code is loaded in CIR or SQR. But if the previous register
content has not been read out in case of a code change, the new code will not be loaded. The code
registers are buffered with a FIFO size of two. Thus if several consecutive code changes are
detected, only the first and the last code is obtained at the first and second register read, respectively.
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PDF描述 |
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| W6693A | USB Bus ISDN S/T Interface Controller(USB總線的ISDN S/T接口控制器) |
| W6694 | PCI Bus ISDN S/T Interface Controller(PCI總線的ISDN S/T接口控制器) |
| W6810 | SINGLE-CHANNEL VOICEBAND CODEC |
| W6810IE | SINGLE-CHANNEL VOICEBAND CODEC |
| W6810IR | SINGLE-CHANNEL VOICEBAND CODEC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W6692A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TE Mode S/T Controller with PCI 2.2 Interface and ACPT |
| W6692ACD | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ISDN LINE INTERFACE|BASIC|CMOS|QFP|100PIN|PLASTIC |
| W6692ACF | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ISDN LINE INTERFACE|BASIC|CMOS|QFP|100PIN|PLASTIC |
| W6694 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:USB Bus ISDN S/T-Controller |
| W6694A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TE Mode S/T Controller with USB 1.1 Interface |
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