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參數資料
| 型號： | W6692 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 通信及網絡 |
| 英文描述： | PCI Bus ISDN S/T Interface Controller(PCI總線的ISDN S/T接口控制器) |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQFP100 |
| 封裝： | 14 X 20 MM, 2.75 MM HEIGHT, QFP-100 |
| 文件頁數： | 48/84頁 |
| 文件大小： | 473K |
| 代理商： | W6692 |
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W6692
- 48 -
8.1.7 Interrupt Mask Register IMASK R/W
Address 18H
Value after reset: FFH
7
6
5
4
3
2
1
0
D_RMR
D_RME
D_XFR
XINT1
XINT0
D_EXI
B1_EXI
B2_EXI
Setting the bit to "1" masks the corresponding interrupt source in ISTA register. Masked interrupt
status bits are read as zero. They are internally stored and pending until the mask bits are zero.
Setting the D_EXI, B1_EXI or B2_EXI bit to "1" masks all the interrupts in D_EXIR, B1_EXIR or
B2_EXIR register, respectively.
8.1.8 D_ch Extended Interrupt Register
D_EXIR
Read_clear
Address 1CH
Value after reset: 00H
7
6
5
4
3
2
1
0
RDOV
XDUN
XCOL
MOC
ISC
TEXP
WEXP
RDOV Receive Data Overflow
Frame overflow (too many short frames) or data overflow occurs in the receive FIFO. In data
overflow, the incoming data will overwrite the data in the receive FIFO. If RDOV interrupt occurs,
software has to reset the receiver and discard the data received.
XDUN Transmit Data Underrun
This interrupt indicates the D_XFIFO has run out of data. In this case, the W6692 will automatically
reset the transmitter and send the inter frame time fill pattern (all 1's) on D channel. The
microprocessor must wait until transmit FIFO ready (via XFR interrupt), re-write data, and issue XMS
command to re-transmit the data.
XCOL Transmit Collision
This bit indicates a collision on the S-bus has been detected. A XRST command must be issued and
software must wait until transmit FIFO ready (via XFR interrupt), re-write data, and issue XMS
command to re-transmit the data.
TIN2 Timer 2 Expiration
This bit is set when Timer 2 counts down to zero.
MOC Monitor Channel Status Change
A change in the GCI mode Monitor Channel Status Register (MOSR) has occurred.
A new Monitor channel byte is stored in the MOR register.
ISC Indication or S Channel Change
A change in the layer 1 indication code or multiframe S channel has been detected. The actual value
can be read from CIR or SQR registers.
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| W6694 | PCI Bus ISDN S/T Interface Controller(PCI總線的ISDN S/T接口控制器) |
| W6810 | SINGLE-CHANNEL VOICEBAND CODEC |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| W6692A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TE Mode S/T Controller with PCI 2.2 Interface and ACPT |
| W6692ACD | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ISDN LINE INTERFACE|BASIC|CMOS|QFP|100PIN|PLASTIC |
| W6692ACF | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ISDN LINE INTERFACE|BASIC|CMOS|QFP|100PIN|PLASTIC |
| W6694 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:USB Bus ISDN S/T-Controller |
| W6694A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TE Mode S/T Controller with USB 1.1 Interface |
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