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參數資料
| 型號： | W90100F |
| 廠商： | WINBOND ELECTRONICS CORP |
| 英文描述： | Embedded Micro-Controller(32位嵌入式的微控制器) |
| 中文描述： | 嵌入式微控制器（32位嵌入式的微控制器） |
| 文件頁數： | 14/61頁 |
| 文件大?。?/td> | 380K |
| 代理商： | W90100F |
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W90100F
Embedded Micro-Controller
Revision 1.1
The above information is the exclusive intellectual property of Winbond Electronics Corp. and shall not be disclosed, distributed or reproduced without permission from Winbond
-14-
Publication Release Date: 10/07/97
7. W90100 Functional Description
The W90100 significantly reduces overall system cost because it integrates most printer system
functions onto a single chip.
7.1 DRAM Controller and ROM Controller
7.1.1 DRAMcontroller
The DRAM controller supports four separate banks of dynamic memory. Either X8 or X32 SIMMs
are supported. CAS#-before-RAS# refresh cycles are performed periodically, as determined by the refresh
timer. The DRAM controller must arbitrate between access requests and refresh requests. Both EDO and
page mode DRAM
'
s are supported.
Bus
Interface
to
CPU core
Refresh Timer
RAS#[0:3]
CAS#[0:3]
MA[0:19]
DRAM Configuration
Register
DRAM Type Register
DRAM Timing
Register
Bank Base Address
Registers
parity[4]
OE#[4]
WE#
BRDY#
FIGURE 7.1 DRAM CONTROLLER BLOCK DIAGRAM
7.1.2 ROM FLASH, and DPI interface controller
The ROM controller also supports upto four banks of ROM and the ROM can be 8-bit, 16-bit, or
32-bit.
Bus
Interface
ROM Configuration
Register
ROM Wait State
Register
Bank Base/Size
Registers
RW#
ROM Address
MA[20]
8-bit/
16-bit/
32-bit
ROM
/FLASH
Memory Data
cs#[4]
BRDY#
csp1, csp2
FIGURE 7.2 ROM CONTROLLER DIAGRAM
For each bank of ROM, two registers are used to specify the bank address range:
ROM Bank Base Address Register.
ROM Bank Size Register.
ROM Configuration Register is used to program the ROM data bus size of each bank.
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