
W83877AF
Publication Release Date: Dec. 1996
Preliminary Version 0.52
- 140 -
8.3 Bit Map Configuration Registers
Table: Bit Map of Configuration Registers
Power-on
Reset Value
D7
0000 0000
0
Register
CR0
D6
0
D5
0
D4
0
D3
D2
D1
D0
PRTMODS1
PRTMODS0
OSCS1
OSCS0
CR1
0000 0000
ABCHG
0
0
0
0
0
0
0
CR2
0000 0000
RA9
RA8
RA7
RA6
RA5
RA4
RA3
CEA
CR3
0011 0000
0
GMENL
EPPVER
GMODS
0
0
SUAMIDI
SUBMIDI
CR4
0000 0000
PRTPWD
GMPWD
URAPWD
URBPWD
PRTTRI
GMTRI
URATRI
URBTRI
CR5
0000 0000
0
0
0
0
ECPFTHR3
ECPFTHR2
ECPFTHR1
ECPFTHR0
CR6
0000 0000
0
OSCS2
SEL4FDD
FIPURDWN
FDCPWD
IDEPWD
FDCTRI
IDETRI
CR7
0000 0000
FDD D T1
FDD D T0
FDD C T1
FDD C T0
FDD B T1
FDD B T0
FDD A T1
FDD A T0
CR8
0000 0000
APDTMS1
APDTMS0
DISFDDWR
SWWP
MEDIA 1
MEDIA 0
BOOT 1
BOOT 0
CR9
0000 1011
PRTMODS2
LOCKREG
EN3MODE
0
CHIP ID 3
CHIP ID 2
CHIP ID 1
CHIP ID 0
CRA
0001 1111
PFDCACT
PEXTACT
PDIRHISOP
PDCHACT
PEXTADP
PEXTEPP
PEXTECP
PEXTECPP
CRB
0000 0000
0
Tx4WC
Rx4WC
ENIFCHG
IDENT
MFM
INVERTZ
DRV2EN
CRC
0010 1000
TURA
TURB
HEFERE
ENBKIRSL
URIRSEL
0
RX2INV
TX2INV
CRD
1010 0011
SIRTX1
SIRTX0
SIRRX1
SIRRX0
HDUPLX
IRMODE2
IRMODE1
IRMODE0
CR10
0000 0000
GIO0AD7
GIO0AD6
GIO0AD5
GIO0AD4
GIO0AD3
GIO0AD2
GIO0AD1
GIO0AD0
CR11
0000 0000
0
0
0
0
0
GIO0AD10
GIO0AD9
GIO0AD8
CR12
0000 0000
GIO1AD7
GIO1AD6
GIO1AD5
GIO1AD4
GIO1AD3
GIO1AD2
GIO1AD1
GIO1AD0
CR13
0000 0000
0
0
0
0
0
GIO1AD10
GIO1AD9
GIO1AD8
CR14
0000 0000
GIOP0MD2
GIOP0MD1
GIOP0MD0
GIO0CSH
GCS0IOR
GCS0IOW
GDA0OPI
GDA0IPI
CR15
0000 0000
000s ssss
1
GIOP1MD2
GIOP1MD1
GIOP1MD0
GIO1CSH
GCS1IOR
GCS1IOW
GDA1OPI
GDA1IPI
CR16
0
0
G1QASEL
G0QBSEL
GMDRQ
PNPCVS
IRIDE
HEFRAS
CR17
0000 0000
0
0
0
PRIRQOD
DSFDLGRQ
DSPRLGRQ
DSUALGRQ
DSUBLGRQ
CR1E
1000 0001
2
1111 1100
2
0111 1100
2
1111 1101
2
1101 1110
2
1111 1110
2
1011 1110
2
0010 0011
2
0000 0101
2
0100 0011
2
0110 0000
2
GMAD7
GMAD6
GMAD5
GMAD4
GMAD3
GMAD2
GMAS1
GMAS0
CR20
FDCAD7
FDCAD6
FDCAD5
FDCAD4
FDCAD3
FDCAD2
0
0
CR21
IDE0AD7
IDE0AD6
IDE0AD5
IDE0AD4
IDE0AD3
IDE0AD2
0
0
CR22
IDE1AD7
IDE1AD6
IDE1AD5
IDE1AD4
IDE1AD3
IDE1AD2
0
1
CR23
PRTAD7
PRTAD6
PRTAD5
PRTAD4
PRTAD3
PRTAD2
PRTAD1
PRTAD0
CR24
URAAD7
URAAD6
URAAD5
URAAD4
URAAD3
URAAD2
URAAD1
0
CR25
URBAD7
URBAD6
URBAD5
URBAD4
URBAD3
URBAD2
URBAD1
0
CR26
FDCDQS3
FDCDQS2
FDCDQS1
FDCDQS0
PRTDQS3
PRTDQS2
PRTDQS1
PRTDQS0
CR27
ECPIRQx2
ECPIRQx1
ECPIRQx0
0
PRTIQS3
PRTIQS2
PRTIQS1
PRTIQS0
CR28
URAIQS3
URAIQS2
URAIQS1
URAIQS0
URBIQS3
URBIQS2
URBIQS1
URBIQS0
CR29
FDCIQS3
FDCIQS2
FDCIQS1
FDCIQS0
IQNIQS3
IQNIQS2
IQNIQS1
IQNIQS0
CR2A
0000 0000
IRTXDSL3
IRTXDSL2
IRTXDSL1
IRTXDSL0
IRRXDSL3
IRRXDSL2
IRRXDSL1
IRRXDSL0
CR2B
0000 0000
PIN1FUN1
PIN1FUN0
PIN2FUN1
PIN2FUN0
PIN3FUN1
PIN3FUN0
PIN93FN1
PIN93FN0
CR2C
0001 0000
Notes:
1. 's' means its value depends on corresponding power-on setting pin.
2. These default values are valid when CR16 bit 2 is 1 during power-on reset; They will be all 0's if CR16 bit 2 is 0.
PIN91FN2
PIN91FN1
PIN91FN0
APEDCRC
ENBNKSL
CLKINSL
0
0