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參數(shù)資料
型號: W83877AF
廠商: WINBOND ELECTRONICS CORP
元件分類: 外設(shè)及接口
英文描述: Multi-Function I/O Port Controller(多功能輸入/輸出口控制器)
中文描述: MULTIFUNCTION PERIPHERAL, PQFP100
封裝: QFP-100
文件頁數(shù): 85/171頁
文件大小: 1634K
代理商: W83877AF
W83877AF
Publication Release Date: Sep. 1996
Preliminary Version 0.50
- 83 -
Bit 7:
IR_MSP - IR mode Select Pulse
Write to 1, the transmitter (IRTX) will send a 64 s pulse to setup a special IR front-end
operational mode. When IR front-end module uses
mode select pin (MD)
and
transmitter
IR pulse (IRTX)
to switch high speed IR (such as FIR or MIR) or low speed IR (SIR or
ASK-IR), this bit should be used.
Bit 6~4:
SIR_SL2~0 - SIR (Serial IR) mode select.
These bits are to program the operational mode of the SIR front-end module. These
values of SIR_SL2~0 will automatically load to pins of IR_SL2~0, respectively, when (1)
AM_FMT=1 (Automatic Format, in Set7.Reg7.Bit7), (2) the mode of Advanced UART is
set to SIR (AD_MD2~0, in Set0.Reg4.Bit7~0).
Reserved,
write 0.
Bit 3:
Bit 2~0:
AIR_SL2~0 - ASK-IR mode Select.
These bits will setup the operational mode of ASK-IR front-end module when AM_FMT=1
and
AD_MD2~0 are set to ASK-IR mode. These values will automatically load to
IR_SL2~0, respectively.
4.3.9.5 Set7.Reg5 - Infrared module (Front End) Select 2 (IRM_SL2)
Reg.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
IRM_SL2
-
FIR_SL2
FIR_SL1
FIR_SL0
-
MIR_SL2
MIR_SL1 MIR_SL0
default Value
0
0
0
0
0
0
0
0
Bit 7:
Bit 6~4:
Reserved,
write 0.
FIR_SL2~0 - FIR mode select.
These bits setup the operational mode of FIR front-end module when AM_FMT=1 and
AD_MD2~0 set to FIR mode. These values will automatically load to IR_SL2~0,
respectively.
Reserved,
write 0.
Bit 3:
Bit 2~0:
MIR_SL2~0 - MIR mode Select.
These bits setup the MIR operational mode when AM_FMT=1
and
AD_MD2~0 set to MIR
mode. These values will be automatically loaded to IR_SL2~0, respectively.
4.3.9.6 Set7.Reg6 - Infrared module (Front End) Select 3 (IRM_SL3)
Reg.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
IRM_SL3
-
LRC_SL2 LRC_SL1 LRC_SL0
-
HRC_SL2 HRC_SL1 HRC_SL0
default Value
0
0
0
0
0
0
0
0
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