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參數(shù)資料
| 型號： | W6694 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 英文描述： | PCI Bus ISDN S/T Interface Controller(PCI總線的ISDN S/T接口控制器) |
| 中文描述： | PCI總線的綜合業(yè)務(wù)數(shù)字網(wǎng)的S / T接口控制器（綜合業(yè)務(wù)數(shù)字網(wǎng)的PCI總線的S / T的接口控制器） |
| 文件頁數(shù)： | 41/98頁 |
| 文件大小： | 1338K |
| 代理商： | W6694 |
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Data Sheet
W6692A PCI ISDN S/T-Controller
Monitor
D
C/I
Publication Release Date:
Mar,2000
Revision 1.0
-41 -
B1
B2
MR
MX
1
st
Octet 2
nd
Octet 3
rd
Octet 4
th
Octet
DD,DU : 768 kbits/s
FSC
: 8 kHz
DCL
: 1536 kHz
FIG 7.8 GCI MODE CHANNEL STRUCTURE
GCI slave mode
: connects to U transceiver such as PEB 2091, CH0 used only.
GCI master mode
: connects to PSB 2165 ARCOFI, uses B1, B2, IC1 and IC2 for voice communication, uses MON1 for
programming, uses C/I1 for pins SA-SD access.
7.8.1 GCI Mode C/I0 Channel Handling
The Command/Indication channel 0 carries real-time status information between the W6692A and another device connected
to the GCI bus interface.
One C/I0 channel conveys the commands and indications between a layer 1 device and layer 2 device. This C/I0 channel is
accessed via register CIR (in receive direction, layer 1 to layer 2) and register CIX (in transmit direction, layer 2 to layer 1). The
C/I code is 4-bit long.
In the receive direction, the code from layer 1 is continuously monitored, with an interrupt being generated anytime a
change occurs. A new code must be found in two consecutive GCI frames to be consided valid and to trigger a C/I code
change interrupt status (double last look criterion).
In the transmit direction, the code written in CIX is continuously transmitted in the channel.
7.8.2 GCI Mode Monitor Channel Handling
The Monitor channel protocol is a handshake protocol used for high speed information exchange between the W6692A and
other devices. The Monitor channel is necessary for:
Programming and controlling devices attached to the GCI interface.
Data exchange between two microprocessor systems attached to two different devices on one GCI backplane. Use of the
Monitor channel avoids the necessity of a dedicated serial communication path between two systems.
The Monitor channel operates on an asynchronous basis. While data transfers on the bus take place synchronized to frame
sync, the flow of data is controlled by a handshake procedure using the Monitor Channel Receiver (MOR) and Monitor Channel
Transmit (MOX) bits. When data is placed into the Monitor channel and the MX bit is activated. This data will be transmitted
repeatedly once per 8 KHz frame until the transfer is acknowledged via the MR bit.
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