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參數資料
| 型號： | W6694 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 英文描述： | PCI Bus ISDN S/T Interface Controller(PCI總線的ISDN S/T接口控制器) |
| 中文描述： | PCI總線的綜合業務數字網的S / T接口控制器（綜合業務數字網的PCI總線的S / T的接口控制器） |
| 文件頁數： | 71/98頁 |
| 文件大小： | 1338K |
| 代理商： | W6694 |
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Data Sheet
W6692A PCI ISDN S/T-Controller
RA13
RA12
RA11
RA23
RA22
RA21
RBC3
RBC2
RBC1
RBC11
RBC10
RBC9
IDLE3
IDLE2
IDLE1
Publication Release Date:
Mar,2000
Revision 1.0
-71 -
A4/29 R/W B1_ADR1
A8/2A R/W B1_ADR2
AC/2B R
B0/2C R
B4/2D R/W B1_IDLE
RA17
RA27
RBC7
IDLE7
RA16
RA26
RBC6
IDLE6
RA15
RA25
RBC5
LOV
IDLE5
RA14
RA24
RBC4
RBC12
IDLE4
RA10
RA20
RBC0
RBC8
IDLE0
B1_RBCL
B1_RBCH
8.2.1 B1_ch receive FIFO
The B1_RFIFO is a 128-byte depth FIFO memory with programmable threshold. The threshold value determines when to
generate an interrupt.
When more than a threshold length of data has been received, a RMR interrupt is generated. After an RMR interrupt, 64 or
96 bytes can be read out, depending on the threshold setting.
In transparent mode, when the end of frame has been received, a RME interrupt is generated. After an RME interrupt, the
number of bytes available is less than or equal to the threshold value.
B1_RFIFO
Read
Address 80H/20H
8.2.2 B1_ch transmit FIFO
The B1_XFIFO is a 128-byte depth FIFO with programmable threshold value. The threshold setting is the same as
B1_RFIFO.
When the number of empty locations is equal to or greater than the threshold value, a XFR interrupt is generated. After a
XFR interrupt, up to 64 or 96 bytes of data can be written into this FIFO for transmission.
B1_XFIFO
Write
Address 84H/21H
8.2.3 B1_ch command register
Value after reset: 00H
7
6
RACK
RRST
B1_CMDR
Read/Write
Address 88H/22H
5
4
3
2
1
0
RACT XACTB B1_128
K
XMS
XME
XRST
RACK Receive Message Acknowledge
After a RMR or RME interrupt, the microprocessor reads out the data in B1_RFIFO, it then sets this bit to explicitly
acknowledge the interrupt.
This bit is write only. It's auto-clear.
RRST Receiver Reset
Setting this bit resets the B1_ch HDLC receiver.
This bit is write-only. It's auto-clear.
RACT Receiver Active
"1": transmitter is active, 64 kHz clock is provided.
"0": transmitter is inactive, clock is LOW to save power.
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