
Preliminary/Confidential
Subject to change without notice
W88227F/W88227QD
- 46 -
1999/10/1 Rev: 0.70
Bit 2:
NOCOR - No Correction
If ECC logic is enabled by bit
EDCEN (0Ah.w5)
, and
QCEN (0Ah.w1)
or
PCEN (0Ah.w0)
, this bit
becomes high if ECC logic is interrupted the followings:
CWEN (0Bh.w4)
is disabled.
Mode mismatch is detected while
MCRQ (0Bh.w1)
is enabled.
Mode erasure is detected while
MCRQ (0Bh.w1)
is enabled. A mode erasure occurs if the
incoming C2PO flag is set for the fourth header byte, indicating unreliable mode data.
Form 2 enabled while ECC logic is set to mode 2. Form 2 blocks should not be corrected. Form 2
can be enabled by control bit
F2RQ (0Bh.w2),
or by the Form bit in the Subheader byte if
ACEN
(0Ah.w4)
is enabled.
Form bit erasure while ECC logic is set to mode 2 and ACEN is enabled. A form bit erasure is
detected if the incoming C2PO flags are set for both Form bits in the Subheader bytes.
ILSYN (0Ch.r6)
becomes high while
SDEN (0Bh.w6)
is enabled
RFERA - Raw Form Erasure
Bit 1:
This bit becomes high when a form bit erasure was detected. A form bit erasure is detected if the
incoming C2PO flags are set for both Form bits in the Submode bytes (bit 5 in byte 18 and 22).
RFERA becomes valid when
SRIb (01h.r5)
becomes active-low, and remains valid until the next block
sync.
Bit 0:
RFORM - Raw Form Bit
This bit is high if the Form bit is high in the Submode bytes of the incoming serial data.
bit becomes valid when flag
SRIb (01h.r5)
becomes active-low, and remains valid until the next block
sync.
This
FRST - Firmware Reset Register - (write 0Fh)
Writing this register, regardless of what value is written, trigger a firmware reset. Flag
FRST (2Fh.r1)
is set
by firmware reset.
STAT3 - Status Register 3 - (read 0Fh)
Bit 7:
STAVAb - obsolete, may return 0 or 1
Bit 5:
ECF - Error Corrected Flag
This bit is used to indicate that there is at least one byte was corrected in the latest available block.
Bit 1:
C2DF - C2 Detected in Block Flag
If
C2WEN (10h.w2)
is high, C2DF becomes high when there is at least one C2PO flag was detected in
the previous block.
Bit 6,4,3,2,0: Reserved