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參數(shù)資料
型號: W88227QD
廠商: WINBOND ELECTRONICS CORP
元件分類: 消費(fèi)家電
英文描述: ATAPI CD-ROM Decoder(支持ATAPI標(biāo)準(zhǔn)的CD-ROM解碼器)
中文描述: SPECIALTY CONSUMER CIRCUIT, PQFP128
封裝: LQFP-128
文件頁數(shù): 64/116頁
文件大小: 787K
代理商: W88227QD
Preliminary/Confidential
Subject to change without notice
W88227F/W88227QD
- 60 -
1999/10/1 Rev: 0.70
SICTL0 - Subcode Interface Control Register 0- (read/write 21h)
Bit 7-6: Reserved
Bit 5:
ASCEND - Alternative Subcode End Timing
If this bit is high, the timing of subcode end interrupt is delayed to end of subcode sync. Otherwise,
the subcode end interrupt is generated at start of subcode sync. This bit is 0 after reset.
Bit 4:
QSIGEN - Signature On QCRCOK Enable
If this bit is high, the signature 0xFFh is written to DRAM with block offset 9E0h if CRC checking of
Q-code is erroneous. This bit is 0 after reset.
Bit 3:
PQENB - P-data or Q-data Enable
Bits 7 and 6 of subcode data are written to the external RAM if this bit is low.
Bit 2-0: SUBCS[2:0] - Subcode Clock Select
If
SBCK (88h.3)
is low and
SCTC (5Ah.w)
is zero, these bits are used to select subcode clock rate.
SCIACK - Subcode Interrupt Acknowledge - (write 22h)
Writing any value to this register de-activates
SCIb (01h.r0)
if
SCIEN (2CH.w4)
is enabled.
SUBSTA - Subcode Status Register - (read 22h)
When
SCIb (01h.r0)
is activated, the microprocessor can read this register to determine the reason of interrupt.
These register is clear to 0 by reading
SUBSTA (22h.r).
Bits 7-5: reserved
Bit 4: QCRCOK - Q-channel CRC OK flag
If Q-channel extraction is enabled, this bit reflects the status of CRC checking of Q-channel
information.
Bit 3:
Bit 2:
reserved
MSS - Missing Subcode Sync
A missing-subcode-sync sets MSS high and negates
SCIb (01h.r0).
A microprocessor interrupt is
activated also if
SCIEN (2Ch.w4)
is enabled.
NESBK - Normal End of Subcode Block
Bit 1:
A normal-subcode-block-end sets NESBK high and negates
SCIb (01h.r0)
. A microprocessor
interrupt is activated also if
SCIEN (2Ch.w4)
is enabled.
ISS - Illegal Subcode Sync
Bit 0:
An illegal-subcode-sync sets ISS high and negates
SCIb (01h.r0)
. A microprocessor interrupt is
activated also if
SCIEN (2Ch.w4)
is enabled.
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