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參數(shù)資料
| 型號： | W88227QD |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 消費家電 |
| 英文描述： | ATAPI CD-ROM Decoder(支持ATAPI標準的CD-ROM解碼器) |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP128 |
| 封裝： | LQFP-128 |
| 文件頁數(shù)： | 61/116頁 |
| 文件大?。?/td> | 787K |
| 代理商： | W88227QD |
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Preliminary/Confidential
Subject to change without notice
W88227F/W88227QD
- 57 -
1999/10/1 Rev: 0.70
C2BEB - C2 Block Error Byte - (read 1Bh)
The Block Error Byte is the OR of all the C2 Error Flag bytes.
RACL, RACH, and RACU - RAM Address Counter - (write 1Ch, 1Dh, 2Dh)
These three registers are used to set linear address of the external RAM. Before accessing registers
RAMRD/RAMWR or triggering linear-address transfer, microprocessor should set these registers. The
microprocessor should write the RAM starting address into the counter while busy flag
UTBY (1Fh.r7)
is low.
Then this counter increases automatically each time when a byte is read or written.
RAMWR - RAM Write Register - (write 1Eh)
To gain access to external RAM, the microprocessor should first wait for flag
UTBY (1Fh.r7)
to become low,
then set the address through
RACLU/H/L(2Dh/1Dh/1Ch)
.
Writing data into register RAMWR triggers the following sequence:
Data is transferred from the microprocessor to register RAMWR.
Data is transferred from RAMWR to the RAM located by the address counter.
Increments RACL, RACH, and RACU increments by one
Clear flag UTBY
RAMRD - RAM Read Register - (read 1Eh)
To gain access to external RAM, the microprocessor should first wait for flag
UTBY (1Fh.r7)
to become low,
then set the address through
RACLU/H/L (2Dh/1Dh/1Ch)
.
Writing data into register RAMRD triggers the following sequence:
Data previously stored in RAMRD is transferred to the microprocessor.
RAM data located by the address counter is transferred to the RAMRD register.
Increments RACL, RACH, and RACU increments by one
Clear flag UTBY
Note that the first data read from RAMRD is invalid.
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