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參數資料
| 型號： | W88227QD |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 消費家電 |
| 英文描述： | ATAPI CD-ROM Decoder(支持ATAPI標準的CD-ROM解碼器) |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP128 |
| 封裝： | LQFP-128 |
| 文件頁數： | 83/116頁 |
| 文件大小： | 787K |
| 代理商： | W88227QD |
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Preliminary/Confidential
Subject to change without notice
W88227F/W88227QD
- 79 -
1999/10/1 Rev: 0.70
GIOCTL - General I/O Port Control Register - (read/write 5Fh)
This register is 0 after chip reset.
Bit 5:
G4OEN - General I/O Port 4 Output Enable
Setting this bit high configure GIO4 as output. Otherwise, it is an input pin.
Bit 5:
G3OEN - General I/O Port 3 Output Enable
Setting this bit high configure GIO3 as output. Otherwise, it is an input pin.
Bit 5:
G2OEN - General I/O Port 2 Output Enable
Setting this bit high configure GIO2 as output. Otherwise, it is an input pin.
Bit 4:
G1OEN - General I/O Port 1 Output Enable
Setting this bit high configure GIO1 as output. Otherwise, it is an input pin.
Bit 3:
GIO4 - General Purpose I/O Port 4
If GIO4 is configured as an input pin, the pin state can be read back from this bit. If GIO4 is
configured as an output pin, set this bit low drive GIO4 low and set this bit high cause a weak pull-up.
Bit 2:
GIO3 - General Purpose I/O Port 3
If GIO3 is configured as an input pin, the pin state can be read back from this bit. If GIO3 is
configured as an output pin, set this bit low drive GIO2 low and set this bit high cause a weak pull-up.
Bit 1:
GIO2 - General Purpose I/O Port 2
If GIO2 is configured as an input pin, the pin state can be read back from this bit. If GIO2 is
configured as an output pin, set this bit low drive GIO2 low and set this bit high cause a weak pull-up.
Bit 0:
GIO1 - General Purpose I/O Port 1
If GIO1 is configured as an input pin, the pin state can be read back from this bit. If GIO1 is
configured as an output pin, set this bit low drive GIO1 low and set this bit high cause a weak pull-up.
TARCTL - Target Control Register - (write 80h)
This register is used to control the automatic target search and header comparison.
Bit 7: TARGEN - Target Function Enable
Setting this bit high enables target search function but does not enable decoder simultaneously. The
operation of target search is triggered by setting
DECEN (0Ah.w7)
high. Then the decoder generates
first interrupt after the target sector, specified by
TARGET (84h-86h)
, is found.
Bit 6: DSCEN - Decoding Sector Counting Enable
If
DSCEN (80h.6)
is enabled, flag
DSFULI (80h.r4)
becomes high if
DSCL (81h,r)
is equal to
DSTL
(81h,w)
at the end of EDC-checking.
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