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參數資料
| 型號： | W88227QD |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 消費家電 |
| 英文描述： | ATAPI CD-ROM Decoder(支持ATAPI標準的CD-ROM解碼器) |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP128 |
| 封裝： | LQFP-128 |
| 文件頁數： | 97/116頁 |
| 文件大小： | 787K |
| 代理商： | W88227QD |
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Preliminary/Confidential
Subject to change without notice
W88227F/W88227QD
- 93 -
1999/10/1 Rev: 0.70
2.3 uP8032 Function
The uP8032 architecture consists of a core controller surrounded by various registers, four general purpose I/O
ports, 512 bytes of RAM, three timer/counters, a serial port. The processor supports 111 different opcodes and
references both a 64K program address space and a 64 K data storage space.
2.3.1 Data Memory
The uP8032 can access up to 64K bytes of external Data Memory. This memory region is accessed by the
MOVX instructions. If the addressed external RAM bank is assigned to AUX_RAM, the MOVX instruction
is directed to the on-chip AUX_RAM without affecting Port 0 and 2. In addition, the uP8032 has the
standard 256 bytes of on-chip RAM. This can be accessed either by direct addressing or by indirect addressing.
There are also some Special Function Registers (SFRs), which can only be accessed by direct addressing.
2.3.2 RAM and AUX_RAM
The size of internal data RAM is 512x 8 bytes. It is divided into two banks: 256 bytes of RAM and 256 bytes
of AUX_RAM.
RAM 0 ~127 can be addressed directly and indirectly. Address pointers are R0 and R1 of the selected register
bank.
RAM 128~255 can only be addressed indirectly. Address pointers are R0 and R1 of the selected registers
bank.
AUX_RAM 0~255 is addressed indirectly as the same way as external data memory with the MOVX
instruction if the following conditions are satisfied:
1.
EARAM (CHPCON.4)
is set high and
2.
DPH
or
P2
equals to
XRBANK (8Fh)
Notice that AUX_RAM can be allocated to address other than 0000h ~ 00ffh by setting
XRBANK (8Fh)
.
Address pointer are R0 and R1 of the selected register bank and DPTR. The following is an example to show
how to access AUX_RAM by MOVX instruction.
MOV CHPCON, #10h
; set EARAM to 1.
MOV XRBANK, #12h
; allocate AUX_RAM to address 1200h to 12FFh.
MOV DPTR, #1234h
; address AUX_RAM with offset 34h
MOV A, #55h
MOVX @DPTR,A
; access AUX-RAM
If
EAROM (CHPCON.5)
is set high, the AUX_RAM is programmed as AUX_ROM Mode that can be fetched
and executed like an internal ROM.
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