
W89C840AF
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17
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Publication Release Date:October 2000
Revision 1.01
status register
structure constructing register
data buffer 1 pointer
next descriptor pointer
first descritpor of the RX descriptor
data buffer 1
status register
structure constructing register
data buffer 1 pointer
next descriptor pointer
second descritpor of the RX descriptor
status register
structure constructing register
data buffer 1 pointer
next descriptor pointer
third descritpor of the RX descriptor
status register
structure constructing register
data buffer 1 pointer
data buffer 2 pointer
last descritpor of the RX descriptor
for storing the first RX packet data
data buffer 1
for storing the 3rd RX packet data
data buffer 1
for storing the nth RX packet data
data buffer 2
for storing the nth RX packet data
data buffer 1
for storing the 2nd RX packet data
data buffer 2
for storing the 2nd RX packet data
skip length between descriptors
As shown by the above diagram, the descriptors construct a mixed structure. Each descriptor with the chain
structure can link to only one data buffer and the last 32 bits are treated as the next descriptor pointer. When the
RLINK bit of the current descriptor, other than the last descriptor in the descriptor list, is reset to low and this
descriptor is programmed to be a ring structure, the current descriptor can point to two data buffers and the skip
length between descriptor is used to point to the next descriptor starting address.
In the last descriptor in the descriptor list, the R03 register will be used to designate the base address of the
data buffer 2 while the RLINK bit of the last descriptor is reset to low, but will be ignored if the RLINK bit of the
last descriptor is set to high. That is, if the last descriptor is a ring structure, it acts as a ring and vice versa.
The next descriptor field of the last descriptor will be the starting address of the first descriptor, no matter
what the value of the RLINK bit of the last descriptor is low or high.
The data flow of a packet in the receiving path is shown as the following diagram.