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參數資料
| 型號： | W89C840AF |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 100/10Mbps Ethernet Controller |
| 中文描述： | 1 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP128 |
| 封裝： | PLASTIC, QFP-128 |
| 文件頁數： | 71/82頁 |
| 文件大?。?/td> | 918K |
| 代理商： | W89C840AF |
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W89C840AF
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71
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Publication Release Date:October 2000
Revision 1.01
The transmit DMA state machine will fetch the first descriptor of the current frame , at first, to decide the
transmission control configuration for the current frame. The transmit DMA state machine will also fetch each
descriptor before read the transmitted data from the data buffer in the host memory.
Bit
Symbol
Description
31
FINT
Frame Interupt.
The W89C840AF will set the Transmit Interrupt bit(bit 0 of C14/CISR) after the
current frame was transmitted if the FINT is previously set by the driver
program. This bit is valid only when the current descriptor is the first descriptor
of the current frame (TFD set).
30
TLD
Last Descriptor.
When set, it indicates that this is the last descriptor of the current frame. The
TLD is valid on each descriptor.
29
TFD
First Descriptor.
When set, it indicates that this is the first descriptor of the current frame. The
TFD is valid on each descriptor.
When both TFD and TLD are high, it means that the current transmission frame
is described by a single descriptor.
When both TRFD and TLD are low, it means that the current descriptor is
neither the first descriptor nor the last descriptor of the current frame.
When TLD is high and TFD is low, it means the current descriptor is the last
descriptor.
When TLD is low and TFD is high, it means the current descriptor is the first
descriptor.
26
ICRC
Inhibit CRC:
The W89C840AF will inhibit CRC appending after the end of transmitted frame
when the ICRC is set by the driver program. Otherwise, the W89C840AF
appends CRC after the end of transmitted frame when ICRC is reset.
This bit is valid only when First Descriptor bit (T01[29]) is set.
25
TLAST
Last Descriptor of the Ring.
When set, it indicates the current descriptor is the last one of the descriptor ring.
This bit preempts bit 24 (TLINK). It means that the next descriptor pointer of the
transmit DMA state machine will automatically jump to the first descriptor
pointed by register C10/CTDLA even the TLINK is set to high and the T03
points to an address other than the one specified by the C10/CTDLA. The
TLAST is valid on each decsriptor.
24
TLINK
Link Address in Transmit Buffer Address 2
When set, it indicates that Transmit Buffer Address 2(T03) contains the start
address of the next descriptor of the descriptor list. Otherwise the T03 is used to
point to the start address of the transmit buffer 2 when the TLINK is reset. The
TLINK is valid on each descriptor.
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| W89C92 | PCMCIA ETHERNET NETWORK TWISTED PAIR INTERFACE CONTROLLER |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| W89C840F | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN NODE CONTROLLER |
| W89C841D | 制造商:WINBOND 制造商全稱:Winbond 功能描述:3-IN - 1 10/100M FAST ETHERNET CONTROLLER |
| W89C841F | 制造商:WINBOND 制造商全稱:Winbond 功能描述:3-IN - 1 10/100M FAST ETHERNET CONTROLLER |
| W89C841F/D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:3-IN-1 100BASE-TX/FX & 10BASE-T Ethernet Controller |
| W89C880F | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN Hub Controller |
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