国产精品成人VA在线观看-国产乱妇乱子视频在播放-国产日韩精品一区二区三区在线-国模精品一区二区三区

參數資料
型號： W89C840AF
廠商： WINBOND ELECTRONICS CORP
元件分類： 微控制器/微處理器
英文描述： 100/10Mbps Ethernet Controller
中文描述： 1 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP128
封裝： PLASTIC, QFP-128
文件頁數： 20/82頁
文件大小： 918K
代理商： W89C840AF
W89C840AF
-
20
-
Publication Release Date:October 2000
Revision 1.01
data
buffer 1
data
buffer 2
data
buffer 3
data
buffer n
Tx
descriptor 1
Tx
descriptor 2
Tx
descriptor 3
Tx
descriptor n
2
Kbytes
FIFO
data
to
MAC
transmission
DMA
state machine
controls
from/to
MAC
control
data
PCI
master
long word
aligning buffer
PCI
PCI slave
The data to be transmitted is stored in the transmit data buffer in the host memory. The transmission DMA
state machine will fetch the data in the host memory into the transmit FIFO. when the transmission DMA is started
up. All of the data fetched from the data buffer will be long word aligned before being queued into the transmission
FIFO. The driver program can inform the transmit DMA the location of the data to be transmitted in the host memory
and then the transmit DMA will fetch the data from that location directly. Because the address of the data may not
long word aligned, so that the transmit DMA need to align the data for passing the data to the MAC in a long word
aligned format. The aligned long word data, and then, is queued into the transmit FIFO. The transmission DMA will
not request the MAC to fetch the data in the FIFO for transmitting until the byte count of the data in the FIFO is
reach the threshold defined by C18/CNCR bit 14~20.
The transmission DMA is implemented a pre-fetch function for speeding the transmit performance. With
this implementation, the transmit DMA will pre-fetch the next packet data in the host memory
after the current
packet data is moved into the transmit FIFO completely. Before starting to fetch the next packet data, the transmit
DMA will assert an interrupt if the transmit early interrupt is enabled. If there is no more packet to be transmitted,
the transmit DMA will report a buffer unavailable status and assert an interrupt if the transmit buffer unavailable
interrupt is enabled. After all of the current packet data in the transmit FIFO are transferred out by the MAC block,
the transmit DMA will try to fetch the next packet data again automatically if the transmit DMA is not fetching the
data from the host memory. A packet transmit interrupt will be asserted when the current packet is transmitted if
the packet transmitted interrupt is enabled.
The transmit DMA will write back the current packet transmit status into the first descriptor of the current
transmit packet when the packet is successfully transmitted or is aborted due to excessive collision.
For consecutively transmitting multiple packets, the software driver can previously program all the packet
data in the host memory and then release the access right to the W89C840AF. Once the transmit DMA is turned
on, the DMA will transmit all of the packet out automatically. The inter-frame gap between these packets will be
specified by the MAC block for complying with the IEEE802.3u specification.
相關PDF資料
PDF描述
W89C841F 3-IN - 1 10/100M FAST ETHERNET CONTROLLER
W89C880F 100Base-Tx/T4 Multiport Repeater Controller(100Base-Tx/T4多端口中繼器控制器)
W89C92 PCMCIA ETHERNET NETWORK TWISTED PAIR INTERFACE CONTROLLER
W89C926 PCMCIA ETHERNET NETWORK TWISTED PAIR INTERFACE CONTROLLER
W89C926F 10M PCMCIA Ethernet Network Interface Controller
相關代理商/技術參數
參數描述
W89C840F 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN NODE CONTROLLER
W89C841D 制造商:WINBOND 制造商全稱:Winbond 功能描述:3-IN - 1 10/100M FAST ETHERNET CONTROLLER
W89C841F 制造商:WINBOND 制造商全稱:Winbond 功能描述:3-IN - 1 10/100M FAST ETHERNET CONTROLLER
W89C841F/D 制造商:未知廠家 制造商全稱:未知廠家 功能描述:3-IN-1 100BASE-TX/FX & 10BASE-T Ethernet Controller
W89C880F 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN Hub Controller
發布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發布成功！您可以繼續發布采購。也可以進入我的后臺，查看報價

發布成功！您可以繼續發布采購。也可以進入我的后臺，查看報價

*型號 *數量 廠商 批號 封裝
添加更多采購

我的聯系方式

*
*
*