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參數資料
| 型號： | W89C840AF |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 100/10Mbps Ethernet Controller |
| 中文描述： | 1 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP128 |
| 封裝： | PLASTIC, QFP-128 |
| 文件頁數： | 58/82頁 |
| 文件大?。?/td> | 918K |
| 代理商： | W89C840AF |
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W89C840AF
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58
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Publication Release Date:October 2000
Revision 1.01
30:17
R
RFOC
Receive FIFO Overflow Counter
The RFOC indicates the number of the packets that are discarded
due to the receive FIFO overflow under the condition of the receive
buffer is not available. This counter will be reset after being read by
the driver program.
16
R
MMP
More Missed Packets
Overflow bit of Missed Packet Counter. The actual number of the
missed packet must be more than the number shown by the bits field
MPC if MMP is set tot high. This bit will be reset after read by a
read operation.
15:0
R
MPC
Missed Packet Counter
The MPC indicates the number of packets that are discarded due to
the receive FIFO overflow which is caused by that the receive DMA
can not get sufficient utilizing on PCI bus, in which, the receive
data buffer is available for the current frame. Although there is a
receive data buffer available for the current frame, the received data
of the current frame in the FIFO can not be completely moved into
the data buffer in host memory before the receive FIFO is overflow
if the receive DMA can not get sufficient utilizing on PCI bus.
This counter will be reset after a read operation.
C24/CMIIR MII Management and ROM Register
The register C24/CMIIR is used to specify the control function and the data message passing for the on board
EEPROM and boot ROM device access.
The followed table described the MII management frame format:
MII Management Protocol
PRE
ST
OP
PHYAD
REGAD
TA
DATA
IDLE
Read
1...1
01
10
AAAAA
RRRRR
Z0
16 bits
Z
Write
1...1
01
01
AAAAA
RRRRR
10
16 bits
Z
PRE:Preample, ST:Start of Frame, OP:Operation code, PHYAD:PHY address, REGAD:register address
TA:Turnaround.
The detailed timings for the read and the write operation, respectively, of the MII management function are
illustrated as the figure below. Each bits in the management data frame(MDIO) are synchronized at the rising
edge of the MII management clock(MDC)
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相關代理商/技術參數 |
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| W89C840F | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN NODE CONTROLLER |
| W89C841D | 制造商:WINBOND 制造商全稱:Winbond 功能描述:3-IN - 1 10/100M FAST ETHERNET CONTROLLER |
| W89C841F | 制造商:WINBOND 制造商全稱:Winbond 功能描述:3-IN - 1 10/100M FAST ETHERNET CONTROLLER |
| W89C841F/D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:3-IN-1 100BASE-TX/FX & 10BASE-T Ethernet Controller |
| W89C880F | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN Hub Controller |
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