
W89C840AF
-
21
-
Publication Release Date:October 2000
Revision 1.01
For concurrently processing the packets transmitting, the transmission DMA asserts the transmit early
interrupt to trigger the software driver to set up the next transmitting packet data more earlier. The data
transmission rate on the MII bus can be either 10 Mbps or 100 Mbps which is quite lower than the rate on PCI bus.
Mostly, the packet data is not yet completely transmitted onto the MII bus even though the packet data with only a
few bytes have been all moved into the transmit FIFO, the transmission DMA still does not issue an interrupt to
host. This will drop the transmit performance if the software driver waits for the current packet being transmitted
onto the MII completely and then set up the next packet data. The transmit early interrupt can avoid the time
consumption when waiting for the transmit completion of the current packet occurs.
Media Access Control function (MAC)
The function of W89C840AF MAC fully meets the requirements, defined by the IEEE802.3u
specification. The following paragraphs will describe the frame structure and the operation of the transmission
and receive.
The transmission data frame sent from the transmit DMA will be encapsulated by the MAC before
transmitting onto the MII bus. The sent data will be assembled with the preamble, the start frame delimiter
(SFD), the frame check sequence and the padding for enforcing those less than 64 bytes to meet the minimum
size frame and CRC sequence.
The out going frame format will be as following
10101010- - - - 10101010 1010111 d0 d1 d2 -- dn padding CRC31 CRC30 ---
CRC0
As mentioned by the above format, the preamble is a consecutive 7-byte long with the pattern
10101010
_
and the SFD is a one byte 10101011 data. The padding data will be all 0 value if the sent data frame
is less than 64 bytes. The padding disable function specified in the bit23 of the transmit descriptor T01 is used
to control if the MAC needs to pad data at the end of frame data or not when the transmitted data frame is less
than 64 bytes. The padding data will not be appended if the padding disable bit is set to high. The bits CRC0 ...
CRC31 are the 32 bits cyclic redundancy check(CRC) sequence. The CRC encoding is defined by the following
polynomial specified by the IEEE802.3.
G( )
=
x
x
x
x
x
x
x
x
x
x
x
x
x
x
+
+
+
+
+
+
+
+
+
+
+
+
+
32
26
23
22
16
12
11
10
8
7
5
4
2
1
This 32 bits CRC appending function will be disabled if the Inhibit CRC of the transmission descriptor
T01 is set to high.
The MAC also performs many other transmission functions specified by the IEEE802.3, including the
inter-frame spacing function, collision detection, collision enforcement, collision backoff and retransmission.
The collision backoff timer is a function of the integer slot time, 512 bit times. The number of slot times to
delay between the current transmission attempt to the next attempt is determined by a uniformly distributed
random integer algorithm specified by the IEEE802.3. The integer, r, is specified as the following
0
2
≤
≤
r
k
where k = min(n, 10)