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參數資料
| 型號： | W89C840AF |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 100/10Mbps Ethernet Controller |
| 中文描述： | 1 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP128 |
| 封裝： | PLASTIC, QFP-128 |
| 文件頁數： | 69/82頁 |
| 文件大小： | 918K |
| 代理商： | W89C840AF |
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W89C840AF
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69
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Publication Release Date:October 2000
Revision 1.01
31:0
RBA1
Receive Buffer Address 1
The RBA1 indicates the physical address, in the host memory space, of the first
receive buffer pointed by the current descriptor. The RBA1 must be longword
aligned. It is valid on each descriptor of the current frame.
R03, Receive Descriptor 3
The R03 is used to specify the start address of the receive buffer 2
Bit
Symbol
Description
31:0
RBA2
Receive Buffer Address 2
The RBA2 indicates the physical address, in the system memory space, of the
second transmit buffer pointed by the current descriptor. The RBA2 must be must
be longword aligned. It is valid on each descriptor of the current frame.
Transmit Descriptors
T00, Transmit Descriptor 0
The T00 is used to describe the transmited frame status.
After the current frame is transmitted, the transmit DMA state machine will update the valid status of the current
transmitted frame into the last descriptor of the current transmitted frame.
The Transmit Access Control is valid on each descriptor of the current frame. The transmit DMA state machine
will release the descriptor by reset the TAC bit when the data pointed by this descriptor is transmitted.
Bit
Symbol
Description
31
TAC
Transmit Access Control :
When the TAC bit is set, the current descriptor allows to be accessed by
W89C840AF, otherwise the W89C840AF can not issue any read or write request
on this descriptor. When the TAC is reset to low, the driver program is allowed
to access this descriptor.
This bit will be reset before completing to fill data into the transmit buffer; set if
the data in the transmit buffer is available.
It is a valid value on each descriptor of the current frame.
15
TE
Transmit Error:
It indicates any one of the following events occurs when TE is set to high.
T00[1] -- Transmit FIFO underflow
T00[8] -- Transmit aborted
T00[10] -- No Carrier sense
T00[11] -- Carrier sense lost
This bit is valid only when the bit TLD (T01[30]) is set, i.e when the current
descriptor is the last descriptor of the current frame.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| W89C840F | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN NODE CONTROLLER |
| W89C841D | 制造商:WINBOND 制造商全稱:Winbond 功能描述:3-IN - 1 10/100M FAST ETHERNET CONTROLLER |
| W89C841F | 制造商:WINBOND 制造商全稱:Winbond 功能描述:3-IN - 1 10/100M FAST ETHERNET CONTROLLER |
| W89C841F/D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:3-IN-1 100BASE-TX/FX & 10BASE-T Ethernet Controller |
| W89C880F | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN Hub Controller |
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