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參數資料
| 型號： | W89C840AF |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 100/10Mbps Ethernet Controller |
| 中文描述： | 1 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP128 |
| 封裝： | PLASTIC, QFP-128 |
| 文件頁數： | 27/82頁 |
| 文件大?。?/td> | 918K |
| 代理商： | W89C840AF |
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W89C840AF
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27
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Publication Release Date:October 2000
Revision 1.01
depending on the configuration of C48/CBRCR. The relationship between the return value from the register
F30/FERBA and the setting to the register C48/CBRCR is described as the following table.
ROM size
C48/CBRCR configuration
F30/FERBA return value
No boot ROM
00000000H
00000000H
No boot ROM
00000001H
00000000H
8 Kbytes ROM
00000002H
FFFFE001H
16 Kbytes ROM
00000003H
FFFFC001H
32 Kbytes ROM
00000004H
FFFF8001H
64 Kbytes ROM
00000005H
FFFF0001H
128 Kbytes ROM
00000006H
FFFE0001H
256 Kbytes ROM
00000007H
FFFC0001H
According to the return value from the register F30/FERBA, The system BIOS can determine how
large the memory space is required and then write the memory space base address back to the register
F30/FERBA. In the cases of no boot ROM, the system BIOS will write back all 0 back into F30/FERBA.
The address decoder of W89C840AF for accessing the on-board ROM memory will be enabled if both
the bit 0 of F30/FERBA and the bit 1 of F04/FCS are set to high at the same time.
the on-board boot ROM data
will be fetched by W89C840AF and loaded into the host memory. On the other hand , the address decoder will
be disabled if the bit 0 of F30/FERBA is reset to 0. Under this case, W89C840AF will ignore the C48/CBRCR,
no matter what content it has.
Usually, the on-board boot ROM data can be read by the system BIOS during host system booting or
power-on reset, the W89C840AF also provides another access way for the application program to do some
unusual applications, like down loading the ROM code or re-programming the ROM code on line.
The procedures for on-line reading the on-board ROM device are described as following.
1) write the offset address into the C28/CBROA.
2) reset the bit 11 of C24/CMIIR to 0.
3) set the bit 14 of C24/CMIIR to 1.
4) read back the data form C24/CMIIR
The procedures for on-line writing the on-board ROM device are described as following
1) write the offset address into the C28/CBROA.
2) reset the bit 11 of C24/CMIIR to 0.
3) write the one byte data into C24/CMIIR bit 0 to bit 7.
4) set the bit 13 of C24/CMIIR to 1.
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| W89C92 | PCMCIA ETHERNET NETWORK TWISTED PAIR INTERFACE CONTROLLER |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| W89C840F | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN NODE CONTROLLER |
| W89C841D | 制造商:WINBOND 制造商全稱:Winbond 功能描述:3-IN - 1 10/100M FAST ETHERNET CONTROLLER |
| W89C841F | 制造商:WINBOND 制造商全稱:Winbond 功能描述:3-IN - 1 10/100M FAST ETHERNET CONTROLLER |
| W89C841F/D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:3-IN-1 100BASE-TX/FX & 10BASE-T Ethernet Controller |
| W89C880F | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN Hub Controller |
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