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參數資料
| 型號： | W89C840AF |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 100/10Mbps Ethernet Controller |
| 中文描述： | 1 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP128 |
| 封裝： | PLASTIC, QFP-128 |
| 文件頁數： | 68/82頁 |
| 文件大?。?/td> | 918K |
| 代理商： | W89C840AF |
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W89C840AF
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68
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Publication Release Date:October 2000
Revision 1.01
1
CRCE
CRC Error:
When set, it indicates that a cyclic redundancy check (CRC) error is occurred on
the received packet. If there is a MII receive error is detected during the packet
receiving, the CRC Error bit is also set even though the CRC may be correct.
This bit is valid only when RFD (R00[9]) or RLD (R00[8]) is set, i.e. the first or
the last descriptor of the current frame.
R01, Transmit Descriptor 1
The R01 is used to describe the receive control configuration for the current frame receiving.
The receive DMA state machine will fetch the first descriptor of the current frame , at first, to decide the receive
control configuration for the current receive frame. The receive DMA state machine will also fetch each descriptor
information before storing the received data to the data buffer in the host memory described by the current
descritpor.
Bit
Symbol
Description
25
RLAST
Last Descriptor of the Ring.
When set, it indicates the current descriptor is the last receive descriptor ring.
This bit preempts the bit 24 (RLINK)of this descriptor. It means that the next
descriptor pointer of the receive DMA state machine will automatically jump to
the first descriptor pointed by the content of the register C0C/CTDLA, even the
RLINK bit is set to high and the descriptor R03 points to an address other than
the one specified by the register C0C/CRDLA. The RLAST is valid on each
descriptor.
24
RLINK
Link Address in Receive Buffer Address 2
When set, it indicates that receive Buffer Address 2 in the descriptor R03
contains the start address of the next descriptor of the descriptor list. Otherwise
the descriptor R03 will point to the start address of the receive buffer 2 when the
RLINK is reset. The RLINK is valid on each descriptor.
23:12
RSZ2
Receive Buffer Size 2.
The RSZ2 indicates the size, in bytes, of the second data buffer pointed by the
current descriptor. If this field is 0, the W89C840AF ignores this buffer. The
buffer size must be long word aligned. The maximum size for this buffer is 4093
bytes.
11:0
RSZ1
Receive Buffer Size 1.
The RSZ1 indicates the size, in bytes, of the first data buffer pointed by the
current descriptor. If this field is 0, the W89C840AF will ignore this buffer. The
buffer size must be longword aligned. The maximum size of this buffer is 4093
bytes.
R02, Receive Descriptor 2
The R02 is used to specify the receive buffer 1 start address
Bit
Symbol
Description
相關PDF資料 |
PDF描述 |
|---|---|
| W89C841F | 3-IN - 1 10/100M FAST ETHERNET CONTROLLER |
| W89C880F | 100Base-Tx/T4 Multiport Repeater Controller(100Base-Tx/T4多端口中繼器控制器) |
| W89C92 | PCMCIA ETHERNET NETWORK TWISTED PAIR INTERFACE CONTROLLER |
| W89C926 | PCMCIA ETHERNET NETWORK TWISTED PAIR INTERFACE CONTROLLER |
| W89C926F | 10M PCMCIA Ethernet Network Interface Controller |
相關代理商/技術參數 |
參數描述 |
|---|---|
| W89C840F | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN NODE CONTROLLER |
| W89C841D | 制造商:WINBOND 制造商全稱:Winbond 功能描述:3-IN - 1 10/100M FAST ETHERNET CONTROLLER |
| W89C841F | 制造商:WINBOND 制造商全稱:Winbond 功能描述:3-IN - 1 10/100M FAST ETHERNET CONTROLLER |
| W89C841F/D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:3-IN-1 100BASE-TX/FX & 10BASE-T Ethernet Controller |
| W89C880F | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN Hub Controller |
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