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參數(shù)資料
型號: W90221F
廠商: WINBOND ELECTRONICS CORP
英文描述: PA-RISC Embedded Micro-Controller(惠普PA-RISC結(jié)構(gòu)的32位嵌入式微控制器)
中文描述: PA - RISC的嵌入式微控制器(惠普的PA - RISC結(jié)構(gòu)的32位嵌入式微控制器)
文件頁數(shù): 12/174頁
文件大小: 2102K
代理商: W90221F
=
The above information is the exclusive intellectual property of Winbond Electronics and shall not be disclosed, distributed or reproduced without permission from Winbond.
12
Versi on 0. 4, March/2000
CS0H#, CS1H#
O
201, 203
Similar to CS0L#/CS1L#, when on-board SDRAM is used,
These pins are NC pins. When SDRAM DIMM module is
used, these signals indicates current cycle accessing the
high word (32 bits)
of DIMM's data bus (double words).
This signals along with WE# and CS# define the command
code of SDRAM configuration cycles.
This signal asserted to indicate a write cycle to DRAM.
In
EDO mode
: these signals are served as CAS# function
and used to latch the column address (MA[0:11]) into
DRAMs. it also indicates which bytes can be accessed.
In
SDRAM mode
: these signals are served as DQMB
function, these are input mask signals for write cycle and
output enable signals for read cycle.
These signals are used to provide the multiplexed row and
column address to the EDO DRAM or SDRAM.
RAS#, CAS#
O
205, 206
WE#
O
204
CAS[0:3]#/
DQMB[0:3]
O
6, 10, 16, 25
MA[0:13]
O
3, 4, 5, 11,
12, 13, 14,
15, 26, 27,
28, 29, 30, 31
157-162, 164,
166-173, 175,
177-184, 186,
188-194
17
19
MD[0:31]
I/O
These signals are used to interface to the DRAM data bus.
CKE
MCLK
O
O
This signal are used to enable or disable MCLK into SDRAM.
This signal is SDRAM clock input, all SDRAM input /ouput
signals are refrenced with MCLK rising edge.
COM0 serial data input from the communication link (modem
or peripheral device).
COM0 serial data output to the communication link (modem
or peripheral device).
COM0 clear to send signal
COM0 data set ready
COM0 data terminal ready
COM0 request to send
COM0 data carrier detect
COM0 ring indicator
COM1 serial data input from the communication link (modem
or peripheral device).
COM1 serial data output to the communication link (modem
or peripheral device).
Serial data-in from a external codec device
Serial data-out to a external codec device
COM0 Serial Port Signal :
SIN0
I
207
SOUT0
O
1
CTS0n
DSR0n
DTR0n
RTS0n
DCD0n
RI0n
COM1 Serial Port Signal :
SIN1
I
I
O
O
I
I
56
55
51
52
53
54
I
208
SOUT1
O
2
Synchronous Serial Port Signal :
SDI
SDO
I
O
106
105
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