
=
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34
Versi on 0. 4, March/2000
As for 4-word code ROM
burst read
, the timing diagram is similar to Fig5.8.4 except there will be
consective
16
COMBE_0# (XRD#) command pulses within one chip select (INTD#, COMBE_2#).
5.9 PARALLEL PORT INTERFACE
Overview :
(Left for Blank)
Block Diagram :
(Left for Blank)
Features :
supports all IEEE P1284 transfer modes including :
- Compatible (centronic) mode (forward channel)
- Nibble mode (reverse channel, compatible with all existing PC hosts - relies on
software control
)
- Byte mode (reverse channel, compatible with IBM PS/2 host)
- EPP mode (bi-directional half-duplex channel - relies on
software control
)
- ECP mode (fast bi-directional half-duplex channel)
Host-side design
Provide a special operation mode to emulate peripheral-side centronic device
Build-in one 16bytes FIFO to accelerate ECP mode and centronic forward transfer
Provide DMA capability to accelerate moving data from parallel port interface to system memory
ECP mode is also including :
- High performance half-duplex forward and reverse channel
- Interlocked handshake, for fast reliable transfer
- Forward "channel-addressing/command transfer" for low-cost peripherals
- Support reverse RLE decompression
- Peer-to-peer capability
Related Pins :
All 17 PPI interface signals share pins with GPIOs. When T_ENECP (port 0xf000003e , bit 4) is set, the
corresponding
GPIOs are redefined as following :
- GPIO[16]/
nStrobe
(output) :
Compatible Mode
: Set active low to transfer data into peripheral device's input latch
ECP Mode
: Used in a closed-loop handshake with "Busy" to transfer data or address information
from
host to peripheral device.
- GPIO[15]/
nAutoFd
(output) :
Compatible Mode
: Set low by host to put some printers into auto-line feed mode. May also be
used as a ninth
data, parity, or command/data control bit.
ECP Mode
: The host drives this signal for flow control in the reverse direction. It is used in an
interlocked handshake with "nAck". "nAutoFd" also provides a ninth data bit used
to